Ultra Low Latency
Trading Infrastructure Technology
Components
Software
C and C++ software components allow for rapid, low latency prototyping. When limited to pure software, tick-to-trade latency is bound by the latency of CPU to nic connection via the pcie bus.
Each component is a separate process communicating with each other by message passing. This tames complexity while optimising cache.
Market Data Converter
- Certified CME MDP3 orderbook
- Trade Summaries
- Multiple Channels
- A/B Arbitration
Order Adapter
- Certified iLink3 order messages and responses
- Multiple simultaneous MSGW segment connections
- Capability to send orders on demand or prime orders to be released when signal thresholds are met
Example Order Book and Trade Signal Generation
- Example basic orderbook signals e.g. rvwap
- Trade signals
Low Latency IPC
- Optimized library for low inter-thread latency between CPU cores
FPGA Acceleration
Market Data
- Orderbook and trade summaries matching software
- UDP multicast
- HLS friendly output for further FPGA processing
Orderbook and Trade Signals
- Retain total control over production
- HLS friendly interface from orderbook and Trade Summary
Order Release
- Pure FPGA Tick to Trade
- When signal threshold met
Multiple Instruments, Multiple Channels, Multiple Segments
- Retain total control over production
- HLS friendly interface from orderbook and Trade Summary